dual-channel, 14-bit, ccd signal processor with precision timing ? core ad9972 rev. spa information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved. features of each channel 1.8 v analog and digital core supply voltage correlated double sampler (cds) with ?3 db, 0 db, +3 db, and +6 db gain 6 db to 42 db, 10-bit variable gain amplifier (vga) 14-bit, 40 mhz analog-to-digital converter (adc) black level clamp with variable level control complete on-chip timing generator precision timing core with 400 ps resolution @ 40 mhz on-chip 3 v horizontal and rg drivers 100-lead, 9 mm 9 mm, 0.8 mm pitch, csp_bga package internal ldo regulator circuitry applications professional hdtv camcorders professional/high end digital cameras broadcast cameras industrial high speed cameras general description the ad9972 is a highly integrated, dual-channel ccd signal processor for high speed digital video camera applications. each channel is specified at pixel rates of up to 40 mhz. the ad9972 consists of a complete analog front end with analog-to-digital conversion combined with a programmable timing driver. the precision timing core allows adjustment of high speed clocks with approximately 400 ps resolution at 40 mhz operation. each analog front end includes black level clamping, cds, vga, and a 40 msps, 14-bit adc. the timing driver provides the high speed ccd clock drivers for the rg_a, rg_b, h1_a to h4_a, and h1_b to h4_b outputs. a 3-wire serial interface is used to program each channel of the ad9972. available in a space-saving, 9 mm 9 mm, csp_bga package, the ad9972 is specified over an operating temperature range of ?25c to +85c. functional block diagram ad9972 sync generator precision timing core internal clocks horizontal drivers rg_b rg_a h1_a to h4_a 4 h1_b to h4_b 4 hd_a vd_a hd_b vd_b internal registers sl_a sdata_a sl_b sdata_b sck_a sck_b cli_a cli_b clamp dout_a ccdin_a 6db ~ 42db vga adc cds 14 clamp dout_b ccdin_b 6db ~ 42db vga adc cds 14 reft_b refb_b vref_b reft_ a refb_ a vref_a ?3, 0, +3, +6db ?3, 0, +3, +6db 1.8v output ldo a 1.8v output ldo b 0 5866-001 figure 1. for more information on the ad9772, contact analog devices, inc. at: afe.ccd@analog.com .
ad9972 rev. spa | page 2 of 2 notes ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d05866f-0-6/06(spa)
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